;******************************************************************************
;* File Name          : startup_bs32f103xx.s
;* Author             : MCU Application Team
;* Description        : BS32F1xx devices vector table for MDK-ARM toolchain.
;*                      This module performs:
;*                      - Set the initial SP
;*                      - Set the initial PC == Reset_Handler
;*                      - Set the vector table entries with the exceptions ISR address
;*                      - Branches to __main in the C library (which eventually
;*                        calls main()).
;*                      After Reset the CortexM4 processor is in Thread mode,
;*                      priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;****************************************************************************** 

; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Stack_Size      EQU     0x00000400

                AREA    STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem       SPACE   Stack_Size
__initial_sp


; <h> Heap Configuration
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>

Heap_Size       EQU     0x00000200

                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem        SPACE   Heap_Size
__heap_limit

                PRESERVE8
                THUMB


; Vector Table Mapped to Address 0 at Reset
                AREA    RESET, DATA, READONLY
                EXPORT  __Vectors
                EXPORT  __Vectors_End
                EXPORT  __Vectors_Size

__Vectors       DCD     __initial_sp                   ; Top of Stack
                DCD     Reset_Handler                  ; Reset Handler
                DCD     NMI_Handler                    ; NMI Handler
                DCD     HardFault_Handler              ; Hard Fault Handler
                DCD     MemManage_Handler              ; MPU Fault Handler
                DCD     BusFault_Handler               ; Bus Fault Handler
                DCD     UsageFault_Handler             ; Usage Fault Handler
                DCD     0                              ; Reserved
                DCD     0                              ; Reserved
                DCD     0                              ; Reserved
                DCD     0                              ; Reserved
                DCD     SVC_Handler                    ; SVCall Handler
                DCD     0                              ; Reserved
                DCD     0                              ; Reserved
                DCD     PendSV_Handler                 ; PendSV Handler
                DCD     SysTick_Handler                ; SysTick Handler

                ; External Interrupts
                DCD     WWDG_IRQHandler                ; Window Watchdog
                DCD     LVDT_IRQHandler                ; LVDT
                DCD     RTC_TAMP_IRQHandler            ; RTC/TAMP/LSE_ERR
                DCD     FLASH_IRQHandler               ; FLASH
                DCD     RCC_IRQHandler                 ; RCC/HSE_ERR
                DCD     EXTI0_IRQHandler               ; EXTI Line 0
                DCD     EXTI1_IRQHandler               ; EXTI Line 1
                DCD     EXTI2_IRQHandler               ; EXTI Line 2
                DCD     EXTI3_IRQHandler               ; EXTI Line 3
                DCD     DMA1_INT0_IRQHandler           ; DMA1 INT0--ADC1/SPI1_RX/UART2_TX/TIM1_CH1/TIM3_UPDATE/TIM2_CH1
                DCD     DMA1_INT1_IRQHandler           ; DMA1 INT1--SPI1TX/UART2_RX/TIM1_CH2/TIM2_CH3/TIM2_UPDATE/TIM4_CH4/TIM4_TRG
                DCD     DMA1_INT2_IRQHandler           ; DMA1 INT2--SPI2_RX/IIC1_RX/IIC2_RX/UART1_TX/TIM1_CH4/TIM1_TRG_COM/TIM2_CH2/TIM4_CH2
                DCD     ADC1_IRQHandler                ; ADC1
                DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
                DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
                DCD     TIM2_IRQHandler                ; TIM2
                DCD     TIM3_IRQHandler                ; TIM3
                DCD     TIM6_IRQHandler                ; TIM6
                DCD     TIM4_IRQHandler                ; TIM4
                DCD     CAN1_TX_IRQHandler             ; CAN1 TX
                DCD     CAN1_RX_IRQHandler             ; CAN1 RX
                DCD     CAN1_ERR_IRQHandler            ; CAN1 ERR
                DCD     CAN1_WKUP_IRQHandler           ; CAN1 WKUP
                DCD     I2C1_IRQHandler                ; I2C1
                DCD     I2C2_IRQHandler                ; I2C2
                DCD     SPI1_IRQHandler                ; SPI1
                DCD     SPI2_IRQHandler                ; SPI2
                DCD     UART1_IRQHandler               ; UART1
                DCD     UART2_IRQHandler               ; UART2
                DCD     DMA1_INT3_IRQHandler           ; DMA1 INT3--SPI2_TX/IIC1_TX/IIC2_TX/UART1_RX/TIM1_UPDATE/TIM3_CH1
                DCD     DMA1_INT4_IRQHandler           ; DMA1 INT4--UART3_TX/TIM1_CH3/TIM3_CH3/TIM2_CH4/TIM2_TRG/TIM4_CH3/TIM4_UPDATE
                DCD     DMA1_INT5_IRQHandler           ; DMA1 INT5--ADC2/UART3_RX/TIM3_CH2/TIM3_CH4/TIM3_TRG/TIM4_CH1
				DCD     UART3_IRQHandler               ; UART3
				DCD     ADC2_IRQHandler                ; ADC2
				DCD     EXTI4_IRQHandler               ; EXTI Line 4
				DCD     EXTI5_9_IRQHandler             ; EXTI Line 5..9
				DCD     EXTI10_15_IRQHandler           ; EXTI Line 10..15

__Vectors_End

__Vectors_Size  EQU  __Vectors_End - __Vectors

                AREA    |.text|, CODE, READONLY

; Reset handler routine
Reset_Handler    PROC
                 EXPORT  Reset_Handler                 [WEAK]
        IMPORT  __main
        IMPORT  SystemInit  
                 LDR     R0, =SystemInit
                 BLX     R0
                 LDR     R0, =__main
                 BX      R0
                 ENDP

; Dummy Exception Handlers (infinite loops which can be modified)

NMI_Handler     PROC
                EXPORT  NMI_Handler                    [WEAK]
                B       .
                ENDP
HardFault_Handler\
                PROC
                EXPORT  HardFault_Handler              [WEAK]
                B       .
                ENDP
MemManage_Handler\
                PROC
                EXPORT  MemManage_Handler          [WEAK]
                B       .
                ENDP
BusFault_Handler\
                PROC
                EXPORT  BusFault_Handler           [WEAK]
                B       .
                ENDP
UsageFault_Handler\
                PROC
                EXPORT  UsageFault_Handler         [WEAK]
                B       .
                ENDP
SVC_Handler     PROC
                EXPORT  SVC_Handler                    [WEAK]
                B       .
                ENDP
PendSV_Handler  PROC
                EXPORT  PendSV_Handler                 [WEAK]
                B       .
                ENDP
SysTick_Handler PROC
                EXPORT  SysTick_Handler                [WEAK]
                B       .
                ENDP

Default_Handler PROC

                EXPORT  WWDG_IRQHandler                [WEAK]
				EXPORT  LVDT_IRQHandler                [WEAK]
                EXPORT  RTC_TAMP_IRQHandler            [WEAK]
                EXPORT  FLASH_IRQHandler               [WEAK]
                EXPORT  RCC_IRQHandler                 [WEAK]
                EXPORT  EXTI0_IRQHandler               [WEAK]
                EXPORT  EXTI1_IRQHandler               [WEAK]
                EXPORT  EXTI2_IRQHandler               [WEAK]
				EXPORT  EXTI3_IRQHandler               [WEAK]
                EXPORT  DMA1_INT0_IRQHandler           [WEAK]
                EXPORT  DMA1_INT1_IRQHandler           [WEAK]
                EXPORT  DMA1_INT2_IRQHandler           [WEAK]
                EXPORT  ADC1_IRQHandler                [WEAK]
                EXPORT  TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
                EXPORT  TIM1_CC_IRQHandler             [WEAK]
                EXPORT  TIM2_IRQHandler                [WEAK]
                EXPORT  TIM3_IRQHandler                [WEAK]                
                EXPORT  TIM6_IRQHandler                [WEAK]
                EXPORT  TIM4_IRQHandler                [WEAK]
                EXPORT  CAN1_TX_IRQHandler             [WEAK]
                EXPORT  CAN1_RX_IRQHandler             [WEAK]
                EXPORT  CAN1_ERR_IRQHandler            [WEAK]
                EXPORT  CAN1_WKUP_IRQHandler           [WEAK]
                EXPORT  I2C1_IRQHandler                [WEAK]
                EXPORT  I2C2_IRQHandler                [WEAK]
                EXPORT  SPI1_IRQHandler                [WEAK]
                EXPORT  SPI2_IRQHandler                [WEAK]
				EXPORT  UART1_IRQHandler               [WEAK]
                EXPORT  UART2_IRQHandler               [WEAK]
                EXPORT  DMA1_INT3_IRQHandler           [WEAK]
				EXPORT  DMA1_INT4_IRQHandler           [WEAK]
				EXPORT  DMA1_INT5_IRQHandler           [WEAK]
				EXPORT  UART3_IRQHandler               [WEAK]
				EXPORT  ADC2_IRQHandler                [WEAK]
				EXPORT  EXTI4_IRQHandler               [WEAK]
				EXPORT  EXTI5_9_IRQHandler             [WEAK]
				EXPORT  EXTI10_15_IRQHandler           [WEAK]
					
					
WWDG_IRQHandler                			
LVDT_IRQHandler                
RTC_TAMP_IRQHandler            
FLASH_IRQHandler               
RCC_IRQHandler                 
EXTI0_IRQHandler               
EXTI1_IRQHandler               
EXTI2_IRQHandler               
EXTI3_IRQHandler               
DMA1_INT0_IRQHandler           
DMA1_INT1_IRQHandler           
DMA1_INT2_IRQHandler           
ADC1_IRQHandler                
TIM1_BRK_UP_TRG_COM_IRQHandler 
TIM1_CC_IRQHandler             
TIM2_IRQHandler                
TIM3_IRQHandler                
TIM6_IRQHandler                
TIM4_IRQHandler                
CAN1_TX_IRQHandler             
CAN1_RX_IRQHandler             
CAN1_ERR_IRQHandler            
CAN1_WKUP_IRQHandler           
I2C1_IRQHandler                
I2C2_IRQHandler                
SPI1_IRQHandler                
SPI2_IRQHandler                
UART1_IRQHandler               
UART2_IRQHandler               
DMA1_INT3_IRQHandler           
DMA1_INT4_IRQHandler           
DMA1_INT5_IRQHandler           
UART3_IRQHandler               
ADC2_IRQHandler                
EXTI4_IRQHandler               
EXTI5_9_IRQHandler             
EXTI10_15_IRQHandler           


                B       .

                ENDP

                ALIGN

;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
                 IF      :DEF:__MICROLIB

                 EXPORT  __initial_sp
                 EXPORT  __heap_base
                 EXPORT  __heap_limit

                 ELSE

                 IMPORT  __use_two_region_memory
                 EXPORT  __user_initial_stackheap

__user_initial_stackheap

                 LDR     R0, =  Heap_Mem
                 LDR     R1, =(Stack_Mem + Stack_Size)
                 LDR     R2, = (Heap_Mem +  Heap_Size)
                 LDR     R3, = Stack_Mem
                 BX      LR

                 ALIGN

                 ENDIF

                 END

;************************ (C) COPYRIGHT BSMicroelectronics *****END OF FILE*****
